Advanced Analog IC Design

Nile University, Egypt, 8-10 November 2010

Professor Willy Sansen
Katholieke Universiteit Leuven-Belgium

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AIM

This 3-day course has been designed to develop an in-depth knowledge on the design of analog integrated circuits, which have to achieve low power consumption. Many important aspects of analog design are covered, from the design of fully-differential operational amplifiers, to the design of switched-capacitor filters, low-power Sigma-Delta AD Converters and coupling effects between the digital and analog subblocks.

This course is intended for several categories of designers:

• Novice designers to learn about design procedures, such that they can master the art of optimum design for low-power consumption
• Digital designers to be able to design and to include low-power analog blocks on digital system chips
• Designers with analog experience, to update their design knowledge

COURSE METHOD

This course consists of a series of lectures and several embedded design exercises. All lectures are taken from the book “Analog Design Essentials” (Springer 2006) which is handed out for this course.

COURSE CONTENT:

Day 1: Basic Topics

00. Introduction
01. Comparison of MOST and bipolar-transistor models
02. Differential voltage and current amplifiers
03. Stability of operational amplifiers
04. Systematic design of operational amplifiers


Day 2: Advanced Topics

05. Important opamp configurations
06. Fully-differential operational amplifiers
07. Offset and CMRR; random and systematic
08. Bandgap and current reference circuits

Day 3: Selected Topics

09. Switched-capacitor filters
10. Low-power Sigma-Delta AD converters
11. Design of LNA’s
12. Coupling in mixed-signal circuits

TARGET PARTICIPANTS

The course is intended for graduate students and researchers as well as design engineers, and product managers at industry. Certificates of completion will also be given.

COURSE VENUE

The course will be held at Nile University’s
Campus, Juhayna Square, 6th of October City

Course Instructor

Willy Sansen has received the MSc degree in Electrical Engineering from the Katholieke Universiteit Leuven in 1967 and the PhD degree in Electronics from the University of California, Berkeley in 1972.
In 1972 he was appointed by the National Fund of Scientific Research (Belgium) at the ESAT laboratory of the K.U.Leuven, where he has been a full professor since 1980. During the period 1984-1990 he was the head of the Electrical Engineering Department. From 1984 to 2008 he was head of the ESAT-MICAS laboratory on analog design, which counts about sixty members and which is mainly active in research projects with industry and in teaching worldwide.
In 1978 he was a visiting professor at Stanford University, in 1981 at the EPFL Lausanne, in 1985 at the University of Pennsylvania, Philadelphia, in 1994 at the T.H. Ulm and in 2004 at Infineon, Villach. Prof. Sansen is a member of several editorial and program committees of journals and conferences. He is cofounder and organizer of the workshops on Advances in Analog Circuit Design in Europe. He is a member of the executive and program committees of the IEEE ISSCC conference. He was program chair of the ISSCC-2002 conference and was President of the Solid-State Circuits Society in 2008/2009. He is a life-fellow of the IEEE.
He has been involved in design automation and in numerous analogue integrated circuit designs for telecommunications, consumer electronics, medical applications and sensors. He has been supervisor of over fifty-eight PhD theses in these fields. He has authored and coauthored more than 620 papers in international journals and conference proceedings and fifteen books, among which “Analog design essentials” (Springer 2008).

Course Schedule

Lectures Abstracts

1.1 Comparison of MOST and Bipolar-Transistor Models
In nanometer CMOS technologies, transistor models have changed. In MOSTs the effects of velocity saturation are much more pronounced. Simple models are derived for both MOSTs and bipolar transistors, to be used as a starting point in design. Approximate expressions are derived which span either strong inversion and weak inversion or strong inversion and velocity saturation. At the end a comparison is given of the strong and weak points of both MOST and bipolar technologies for high-speed and low-noise design.

1.2 Differential Voltage and current Amplifiers
Most practical designs are built up by means of differential pairs, current sources and two-transistor cascodes. They are analyzed in detailed and design plans are drawn up. Most attention goes to the differential pair as it the most essential building block in all fully-differential circuits in mixed-signal systems.

1.3 Stability of operational amplifiers
Two-stage operational amplifiers in unity-gain configuration, suffer from peaking unless a compensation capacitance is added, or the current is increased in the second stage. These stability conditions are examined followed by three techniques to get rid of the positive zero. These design plans are extended to three-stage amplifiers with nested Miller compensation.

1.4 Systematic design of operational amplifiers
A design plan is developed to optimize the power reduction of two-stage Miller operational amplifiers. This is extended by an estimate of the maximum Gain-bandwidth product of such amplifiers in future nanometer CMOS technologies.
Finally a number of other specifications are derived such as the common-mode input range, the output impedance, the Sew-Rate and the noise performance.

2.1 Important opamp configurations
In practice only a few amplifier configurations are used. Examples are the symmetrical amplifier, the folded-cascode and the Miller OTA amplifier. In this presentation, all of them are optimized with respect to power consumption, high-speed capability and noise. The compromises are discussed in detail and a comparison is provided. In addition, some specific design techniques are reviewed to enhance performance.

2.2 Fully-Differential Amplifiers
Fully-differential amplifiers consume much more power than single-ended amplifiers because of the additional common-mode feedback amplifier. This presentation aims at the optimization of the power consumption of several often-used common-feedback amplifiers. The design plans are spelled out followed by an evaluation and a comparison.

2.3 Offset and CMRR; Random and Systematic
Random mismatch between the equal-designed transistors in a differential pair causes offset and reduction of both the CMRR and the PSRR. This phenomenon of random mismatch is discussed in detail. Its relevance is analyzed for differential pairs, current mirrors, etc. At the end of the Chapter, a number of design guidelines are put together for better matching.

2.4 Bandgap and current reference circuits
As a voltage reference for precision applications, a bandgap reference is normally used. It consists of a bipolar transistor in which a resistor develops a PTAT (Proportional-to absolute-temperature) voltage. Several realizations are discussed in both bipolar and CMOS technologies. Attention is paid to sub-1 Volt references as well, and resistor-less references. Finally current reference scan be derived from voltage references provided resistors or switched-capacitor resistors are available.

3.1 Switched-capacitor filters
High-frequency sampling of analog signals, allows the realization of fully-integrated filters. They consist of well-matched capacitors, switches and operational amplifiers. The properties are investigated of such sampled systems, followed by a estimate of limitations at both high and low frequencies. Finally a short comparison is given with switched-current filters.

3.2. Low-power Sigma-Delta AD converters
Analog-to-digital conversion with high resolution is only possible with oversampling techniques. Different architectures (with high-order filters and multi-bit conversion) are analyzed which allow low power performance. Realizations are discussed for sub-1 Volt operation, leading to excellent Figures-of-Merit.

3.3. Design of LNA’s
Low-noise amplifiers (LNA’s) are the first amplifiers in receivers. They must thus operate at the same high frequencies as the carriers themselves. For GSM, CDMA, etc, these frequencies are beyond 1 GHz. Also such amplifier must be able to handle very small signals, close to the noise level and at the same time very high signal levels, close to the transmitter antenna. Noise and distortion are thus both of importance. Finally the reception antenna is connected to the amplifier over a transmission line, usually with 50 ? characteristic impedance. Impedance and noise matching thus determine the design of such LNA. The compromises will be discussed followed by a comparison based on a FOM.

3.4. Coupling in mixed-signal circuits
Today most integrated circuit realizations include both digital and analog functions, on the same substrate. Processors include ADCs and DACs. RF functions are added to digital processors. Many more examples can be found. As a consequence, coupling occurs between both types of circuits. Most often the digital blocks generate spikes on the ground and supply lines, which are sensed by the analog amplifiers. Firstly the several sources of coupling are categorized. Then layout techniques are discussed to reduce coupling. Attention is also paid to the specification power-supply-rejection-ratio and how it can be improved for some specific amplifier blocks.

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